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[[File:Open3S500E-assemble.gif|right|thumb|250px|Open3S500E]]
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__TOC__<br />
 
== WaveShare Open-3S500E ==
 
== WaveShare Open-3S500E ==
  
Das ist ein sehr gut dokumentiertes [https://www.waveshare.com/openepm1270-standard.htm Entwickler Board] der Firma [https://www.waveshare.com/ WaveShare] mit ausgezeichnetem Support. Dieses Board hat einen CPDL der Firma Altera (EPM-1270) und es wird mit zahlreichem Zubehör geliefert.  
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Das ist ein sehr gut dokumentiertes [https://www.waveshare.com/wiki/Open3S500E FPGA Entwickler Board] der Firma [https://www.waveshare.com/ WaveShare] mit ausgezeichnetem Support. Dieses Board hat einen FPGA der Firma XILINX (XC3S500E) und es wird mit zahlreichem Zubehör geliefert.  
  
<gallery mode="traditional" widths=160px heights=160px perrow=4 caption="">
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Wie bei WaveShare üblich ist alles sehr modular aufgebaut. Es gibt verschiedene '''Core Module''' von XILINX und Altera, die auf WaveShare standardisierte "'''Mother Boards'''" gesteckt werden.
Image:OpenEPM1270-board 1.jpg
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Image:OpenEPM1270-board 2.jpg  
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An den Motherboards können zahlreiche Erweiterungen gesteckt werden, sodass man diese Entwicklungsumgebung sehr flexibel gestalten kann.
Image:OpenEPM1270-package B.jpg  
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<br />
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=== Core Board 3S500E ===
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Das Core Board enthält den FPGA und die notwendige Mindestbeschaltung. Es gibt unterschiedliche Core Boards von verschiedenen Hersteller (XILINX und Altera).
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<gallery mode="traditional" widths=140px heights=140px perrow=4 caption="">
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Core3S500E-2.jpg
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Core3S500E-3.jpg
 
</gallery>
 
</gallery>
  
 
<br />
 
<br />
=== Was ist auf dem Board ===
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===== Beschreibung des Core Board 3S500E =====
  
# EPM1270:onboard CPLD device which features:  
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[[File:Core3S500E-intro.jpg|500px|Open3S500E]]
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# XC3S500E: XILINX Spartan-3E FPGA
 
#* Operating Frequency: 50MHz
 
#* Operating Frequency: 50MHz
#* Operating Voltage: 1.5-3.3V
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#* Operating Voltage: 1.15V~3.3V
#* Package: QFP144
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#* Package: QFP208
 
#* I/Os: 116
 
#* I/Os: 116
#* LEs: 1,270, the equivalent to 4,000 logic gates
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#* LEs: 500K
#* Debugging/Programming: JTAG
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#* RAM: 360kb
# AMS1117-3.3: 3.3V voltage regulator
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#* DCMs: 4
# Power switch
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#* Debugging/Programming: supports JTAG
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# AMS1117-3.3, 3.3V voltage regulator
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# AMS1117-2.5, 2.5V voltage regulator
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# AMS1117-1.2, 1.2V voltage regulator
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# XCF04S, onboard serial FLASH memory, for storing code
 
# Power indicator
 
# Power indicator
# LEDs: convenient for indicating I/O status and/or program running state
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# LEDs
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# FPGA initialization indicator
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# Reset button
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# nCONFIG button: for re-configuring the FPGA chip, the equivalent of power reseting
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# 50M active crystal oscillator
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# JTAG interface: for debugging/programming
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# FPGA pins expander, VCC, GND and all the I/O ports are accessible on expansion connectors for further expansion
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<br />
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=== Mother Board DVK600 ===
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Das Motherboard verbindet das Core Board mit den zahlreichen Zusatz Modulen.
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<gallery mode="traditional" widths=140px heights=140px perrow=4 caption="">
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DVK600-2.jpg
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DVK600-3.jpg
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Open3S500E-1.jpg
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Open3S500E-2.jpg
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</gallery>
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<br />
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===== Beschreibung des DVK600 Motherboard =====
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[[File:DVK600-intro.jpg|600px|DVK600]]
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# FPGA CPLD core board connector: for easily connecting core boards which integrate an FPGA CPLD chip onboard
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# 8I/Os_1 interface, for connecting accessory boards/modules
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# 8I/Os_2 interface, for connecting accessory boards/modules
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# 16I/Os_1 interface, for connecting accessory boards/modules
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# 16I/Os_2 interface, for connecting accessory boards/modules
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# 32I/Os_1 interface, for connecting accessory boards/modules
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# 32I/Os_2 interface, for connecting accessory boards/modules
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# 32I/Os_3 interface, for connecting accessory boards/modules
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# SDRAM interface
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#* for connecting SDRAM accessory board
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#* also works as FPGA CPLD pins expansion connectors
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# LCD interface, for connecting LCD22, LCD12864, LCD1602
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# ONE-WIRE interface: easily connects to ONE-WIRE devices (TO-92 package), such as temperature sensor (DS18B20), electronic registration number (DS2401), etc.
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# 5V DC jack
 
# Joystick: five positions
 
# Joystick: five positions
# Reset button
 
 
# Buzzer
 
# Buzzer
# 8 I/Os interface: for connecting accessory boards
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# Potentiometer: for LCD22 backlight adjustment, or LCD12864, LCD1602 contrast adjustment
# 16 I/Os interface: for connecting accessory boards
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# Power switch
# 8 I/Os interface: for connecting accessory boards
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# Buzzer jumper
# 32 I/Os interface: for connecting accessory boards
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# ONE-WIRE  
For interface 9-12: it's possible to emulate the interfaces as ONE-WIRE, USART, I2C, SPI, PS/2, etc.
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# Joystick Jumper
<ol start="13">
 
<li>1-WIRE interface: for connecting 1-WIRE devices (TO-92 package), such as temperature sensor (DS18B20), electronic registration number (DS2401), etc.</li>
 
<li>Character LCD interface: for connecting character LCD, such as the LCD1602 (5V Blue Backlight) in Package B</li>
 
<li>5V DC jack</li>
 
<li>JTAG interface: for programming/debugging</li>
 
<li>MCU pins connector: all the MCU pins are accessible on expansion connectors for further expansion</li>
 
<li>LEDs jumper</li>
 
<li>Buzzer jumper</li>
 
</ol>
 
  
<pre>For jumper 18-19:
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<pre>All the I/O interfaces (2. to 8.):
  
- short the jumper to connect to I/Os used in example code
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- capable of being simulated as USART, I2C, SPI, PS/2, etc.
- open the jumper to connect to other</pre>
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- capable of driving devices such as FRAM, FLASH, USB, Ethernet, etc.
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</pre>
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<pre>For jumpers 17-19:
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- short the jumper to connect to I/Os used in example code
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- open the jumper to connect to other custom pins via jumper wires
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</pre>
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<pre>The DVK600 supports a wide range of different core boards, therefore, some of the interfaces may be Not-Connected and useless while connecting to certain core board. For instance, while connecting to Core3S500E/CoreEP2C8, the '⑧ 32I/Os_3' is Not-Connected.
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</pre>
  
 
<br />
 
<br />
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=== Zusatz Module ===
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Die Zusatz Module werden einfach an das Motherboard gesteckt und sind so mit dem Core Board verbunden. Je nach Projekt verwendet man die gewünschten Module und steckt sich so einfach sein Gesamtsystem zusammen.
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<gallery mode="traditional" widths=130px heights=130px perrow=7 caption="">
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4x4-Keypad-5.jpg
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8-Push-Buttons-5.jpg
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8-SEG-LED-Board-5.jpg
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AT24CXX-EEPROM-Board-5.jpg
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AT45DBXX-DataFlash-Board-5.jpg
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CY7C68013A-USB-Board-5.jpg
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I2C-cascading-x3.jpg
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LCD1602-blue-5.jpg
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LCD12864-ST-3.3V-blue-4.jpg
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PL2303-USB-UART-Board-mini-5.jpg
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RS232-Board-5.jpg
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VGA-PS2-Board-5.jpg
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</gallery>
 +
<br />
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=== Dokumentation ===
 
=== Dokumentation ===
  
* [[Media:Xilinx_Ug332.pdf|Xilinx Spartan 3 configuration guide]]
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* [[Media:Core3S500E-Schematic.pdf|Core3S500E Schematic]]
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* [[Media:DVK600-Schematic.pdf|DVK600 Schematic]]
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* [[Media:Xilinx_Ug332.pdf|Xilinx Spartan-3 Configuration Guide]]
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* [[Media:Spartan-3_Generation_User_Guide.pd.pdf|Xilinx Spartan-3 Generation User Guide]]
  
 
<br />
 
<br />
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=== WEB Links ===
 
=== WEB Links ===
  
 
* [https://www.waveshare.com/product/fpga-tools/xilinx/xilinx-boards/open3s500e-package-b.htm Open-3S500E Entwickler Board]
 
* [https://www.waveshare.com/product/fpga-tools/xilinx/xilinx-boards/open3s500e-package-b.htm Open-3S500E Entwickler Board]
 
* [https://www.waveshare.com/wiki/Open3S500E WaveShare WIKI]
 
* [https://www.waveshare.com/wiki/Open3S500E WaveShare WIKI]

Aktuelle Version vom 24. September 2019, 16:12 Uhr

Open3S500E


WaveShare Open-3S500E

Das ist ein sehr gut dokumentiertes FPGA Entwickler Board der Firma WaveShare mit ausgezeichnetem Support. Dieses Board hat einen FPGA der Firma XILINX (XC3S500E) und es wird mit zahlreichem Zubehör geliefert.

Wie bei WaveShare üblich ist alles sehr modular aufgebaut. Es gibt verschiedene Core Module von XILINX und Altera, die auf WaveShare standardisierte "Mother Boards" gesteckt werden.

An den Motherboards können zahlreiche Erweiterungen gesteckt werden, sodass man diese Entwicklungsumgebung sehr flexibel gestalten kann.


Core Board 3S500E

Das Core Board enthält den FPGA und die notwendige Mindestbeschaltung. Es gibt unterschiedliche Core Boards von verschiedenen Hersteller (XILINX und Altera).


Beschreibung des Core Board 3S500E

Open3S500E

  1. XC3S500E: XILINX Spartan-3E FPGA
    • Operating Frequency: 50MHz
    • Operating Voltage: 1.15V~3.3V
    • Package: QFP208
    • I/Os: 116
    • LEs: 500K
    • RAM: 360kb
    • DCMs: 4
    • Debugging/Programming: supports JTAG
  2. AMS1117-3.3, 3.3V voltage regulator
  3. AMS1117-2.5, 2.5V voltage regulator
  4. AMS1117-1.2, 1.2V voltage regulator
  5. XCF04S, onboard serial FLASH memory, for storing code
  6. Power indicator
  7. LEDs
  8. FPGA initialization indicator
  9. Reset button
  10. nCONFIG button: for re-configuring the FPGA chip, the equivalent of power reseting
  11. 50M active crystal oscillator
  12. JTAG interface: for debugging/programming
  13. FPGA pins expander, VCC, GND and all the I/O ports are accessible on expansion connectors for further expansion


Mother Board DVK600

Das Motherboard verbindet das Core Board mit den zahlreichen Zusatz Modulen.


Beschreibung des DVK600 Motherboard

DVK600

  1. FPGA CPLD core board connector: for easily connecting core boards which integrate an FPGA CPLD chip onboard
  2. 8I/Os_1 interface, for connecting accessory boards/modules
  3. 8I/Os_2 interface, for connecting accessory boards/modules
  4. 16I/Os_1 interface, for connecting accessory boards/modules
  5. 16I/Os_2 interface, for connecting accessory boards/modules
  6. 32I/Os_1 interface, for connecting accessory boards/modules
  7. 32I/Os_2 interface, for connecting accessory boards/modules
  8. 32I/Os_3 interface, for connecting accessory boards/modules
  9. SDRAM interface
    • for connecting SDRAM accessory board
    • also works as FPGA CPLD pins expansion connectors
  10. LCD interface, for connecting LCD22, LCD12864, LCD1602
  11. ONE-WIRE interface: easily connects to ONE-WIRE devices (TO-92 package), such as temperature sensor (DS18B20), electronic registration number (DS2401), etc.
  12. 5V DC jack
  13. Joystick: five positions
  14. Buzzer
  15. Potentiometer: for LCD22 backlight adjustment, or LCD12864, LCD1602 contrast adjustment
  16. Power switch
  17. Buzzer jumper
  18. ONE-WIRE
  19. Joystick Jumper
All the I/O interfaces (2. to 8.):

 - capable of being simulated as USART, I2C, SPI, PS/2, etc.
 - capable of driving devices such as FRAM, FLASH, USB, Ethernet, etc.
For jumpers 17-19:

 - short the jumper to connect to I/Os used in example code
 - open the jumper to connect to other custom pins via jumper wires
The DVK600 supports a wide range of different core boards, therefore, some of the interfaces may be Not-Connected and useless while connecting to certain core board. For instance, while connecting to Core3S500E/CoreEP2C8, the '⑧ 32I/Os_3' is Not-Connected.


Zusatz Module

Die Zusatz Module werden einfach an das Motherboard gesteckt und sind so mit dem Core Board verbunden. Je nach Projekt verwendet man die gewünschten Module und steckt sich so einfach sein Gesamtsystem zusammen.


Dokumentation


WEB Links